7 Comments
Apr 16Liked by Casey Muratori

Cannot really add anything valuable to this discussion since my experience is too little, just wanted to say thank you for your tremendous effort because you are, and i think by far, the best teacher I have had on this and your course about performance aware programming i have recently started is just overwhelmingly amazing and I enjoy every second of it. It sparks a joy in programming that i have seemed to bury in the years of web development i have lost myself in haha

Incredible Stuff Casey!

Expand full comment
Apr 15Liked by Casey Muratori

Original Spectre paper explicitly mentions ARM and RISC-V as ISA's that can be vulnerable to speculative attacks: https://spectreattack.com/spectre.pdf

Of course actual hw implementation matters, it is not a property of ISA.

Expand full comment
author
Apr 16·edited Apr 16Author

Yes. The original article seemed to be confused about a lot of things like this, and seemed to imply that somehow x64 was unique in being pipelined and having speculative execution, among other things. It didn't make a lot of sense.

- Casey

Expand full comment

Dear Casey Muratori,

As someone who is passionate about software development and continuously striving to improve, I would greatly appreciate your perspective on the "best" approach to learning programming effectively. With the vast array of resources, programming languages, and learning methodologies available, it can be overwhelming to determine the optimal path.

Thank you for your time and consideration.

Expand full comment

He really has good energy in this video! Usually people who are too excited and call things they don't fully understand/remember super cool turn me off but for some reason, he seems genuine to me.

Expand full comment

Maybe the article is bad, but I too recently started thinking that Arm is probably going to take over. As I understand, it is easier to evolve RISC architecture than CISC. If that is not true, then I don't understand the benefit of having RISC at all.

Expand full comment
author

As I mentioned, and as the Chips and Cheese response article says as well, RISC vs. CISC isn't a particularly meaningful distinction anymore. Desktop and mobile ISAs and microarchitectures are too complex nowadays for anything to really be considered RISC in my opinion. RISC-V, for example, has very complex instructions in its instruction set, even if you only consider reasonable extensions that people need (like RISC-V V). I defy anyone to argue that LMUL and VGATHER, for example, are "RISC-like" instructions in the sense that the term RISC originally meant.

- Casey

Expand full comment